DDR3 Routing

[Reva_851]

Hello Everyone,

I need help regarding to the routing of LPDDR3 with A64 processor. I have routed data signal on the top layer and data strobe signal on the bottom layer of single byte lane. Is it ok if I route these signals in this way if the delay is already accounted for?

This is data signal



This is data strobe signal

[robertferanec]

I would not do that.

[Reva_851]

Thank you sir for your response,
I will try to route signals on same layer