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DDR3 Routing

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  • DDR3 Routing

    Hello Everyone,

    I need help regarding to the routing of LPDDR3 with A64 processor. I have routed data signal on the top layer and data strobe signal on the bottom layer of single byte lane. Is it ok if I route these signals in this way if the delay is already accounted for?

    This is data signal

    Click image for larger version

Name:	Data signal.png
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Size:	157.1 KB
ID:	20133

    This is data strobe signal

    Click image for larger version

Name:	Data strobe signal.png
Views:	25
Size:	53.1 KB
ID:	20134

    Last edited by Reva_851; 07-07-2022, 02:41 AM.

  • #2
    I would not do that.

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    • #3
      Thank you sir for your response,
      I will try to route signals on same layer

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