Power Plane

[mostafa222]

Hi Dear Robert. How Do You Draw This Power Plane? Indeed, My Question is how You Can guest the shape? i see the open rex board. for example, you draw the shape in below figure. how do you decide what is the necessary shape? do you use the track to connect component to power plane or you draw the power plane in way that can cover that component?

[robertferanec]

When we do placement, we always think ahead and try to imagine how the power planes will look - then it is quite simple, just draw the plane under all the power pins and use VIAs to connect it. Initially we connect all the power pins by tracks (instead of drawing power plane, we draw tracks) and then based on the tracks we can see the required power plane shape. When we are improving/finishing the layout, we delete power tracks from the particular layer and draw the polygons instead.

[mostafa222]

Thanks dear robert. I learn many things from you.

[Avinashdara]

Hi Robert, I am designing a 8 layer board with iMX6Q. For accommodating power planes, we want to split the power planes(we have two power planes in my stack-up). Could you suggest me the best possible way to create split power planes so that there will be less effect to signal integrity?

[mairomaster]

The simple rule is don't use the split plane layer as a reference for high-speed signals. In case you definitely need to, make sure the important signals don't cross split planes and stay over the same plane.

[Avinashdara]

Thanks for the reply mairomaster. As you said, it's not preferable to use a split plane layer as a reference layer for high speed signals. I have to use the split power planes, as imx6Q BGA has VDDCORE, VDDSOC, etc. voltage rails that carry high current. So, could you please suggest a best way on how to mitigate the signal integrity issues that I face with split power planes.

I do have an second option for creating different voltage polygons on the top layer. But I am not sure of the problems I face with this.

[robertferanec]

I am not sure how easy/difficult it is to do the QUAD on 8 layers. I believe we wanted to make OpenRex on 6-8 layers, but we ended up with 10.

[Avinashdara]

Thanks for the reply robertferanec , I know its little difficult to go with 8 layers on iMX6Q, we have only 8 layers option from the manufacturer's side. So, could you please suggest me the best way to create polygons or split power planes in a way that I can meet good signal integrity, less EMC issues.

[robertferanec]

One of the problems why we increased the number of layers to 10 were power planes.

[Avinashdara]

Thanks for the reply robertferanec. May I know the Do's & Don'ts that I have to follow for creating polygons on signal layers

[robertferanec]

We sometimes create mix layers (tracks + polygons), no problems. We are just careful - we keep bigger clearance between the planes and signal (e.g. in case the plane is noise we need to be sure we are not routing close to it)

[Avinashdara]

Thanks robertferanec What's the maximum and minimum clearance that I should maintain between planes and signal ?

[robertferanec]

Simple answer is - as much as you can. You probably would like to hear absolute numbers, but these depends on your stackup and the signals. Have a look at some of our designs to get some ideas - you can download the Altium files. Check distance and see the stackup: http://www.imx6rex.com/

[Avinashdara]

Thanks robertferanec We will look at the design files and get some pointers

[Avinashdara]

Hi robertferanec Unfortunately the free version of Altium is not available. We faced the same issue during the Fedevel course. Is there any possibility to view imx6Rex design files in any open source EDA tools like KiCAD?