Lengths matching home work!

[robertferanec]

This is called uncoupled length. You can set higher tolerance for it. Go to Design -> Rules -> Routing -> Differential pair routing: select your differential pair rule: set "Max Uncoupled Length" to higher number (you can check the longest uncoupled length in DRC report, so set it to be a little bit longer ... just be sure you are ok with all the uncoupled length). See the screenshot below:

[Via]

The area like this. I need update the the max gap in Diff rules or there is another way to solve this problem?

[robertferanec]

Please could you be more specific? I am not sure what rules you would like to set for what.
PS: You can always have a look at our open source designs to check how we set them up: http://www.imx6rex.com/

[Via]

Yes I know, How we can setup a rules for them? I had idea to define the room in area that we make space for length matching in Diff but doesn't work!

[robertferanec]

This is uncoupled length. We set it intentionally low, so Altium then highlights all the segments which have the uncoupled length (the places where space between tracks is different as specified by stackup and impedance). It is not length matching.

[Via]

Sorry for delay , here is errors from your projects

[Via]

[robertferanec]

- yes, waves in OpenRex are done manually
- wave shape doesn't influence length matching and it is still useful to setup the rules. Maybe this can help: https://www.fedevel.com/welldoneblog...useful-things/

[zagrosmega]

Altium is not good in fitting the waves into small space. So very often I do the waves manually...

so i think that in OpenRex pcb(imx6) many signal traces like ddr3 data line and address line are routed with this method ok?and does it means that (length matching rules) in altium designer cannot be useful in some cases ,because altium uses standard wave shape for length tuning .

[robertferanec]

Interesting that I made DRC check on OpenRex board and get same error!!

Can you attach screenshots?

[robertferanec]

In case of using the waves to match the length of tracks, how can we guarantee that space between two adjacent track is x3 times of width of track (for preventing crosstalk).

Altium is not good in fitting the waves into small space. So very often I do the waves manually e.g. I create one and then copy and paste it ... or I just draw it. When you draw the waves, you will get the idea what the space between the tracks should look like (you can also measure it). If you use interactive length tuning, then set "Gap" to be 3x track width (often I route 50OHMs by 0.1mm, so I use space 0.3mm)

I have some dead polygon between my DDR3 tracks, is good to ground them with via?
a

From EMC point of view, no polygan is better than floating ploygan, becuase it increases the coupling capacitance and they cause crosstalk. So, connect them to GND by via or remove it

If your track width is 6mils, the minimum space between waves should be at least 18mils.

You have plenty of space, trust me

[ATTACH=CONFIG]n7016[/ATTACH]

In case of using the waves to match the length of tracks, how can we guarantee that space between two adjacent track is x3 times of width of track (for preventing crosstalk).

[Via]

Thank you for feedback, Yes I corrected them depend on your suggestion.
My pcb is ready for manufacturing and I finalizing the board.
I have two question:
I have some dead polygon between my DDR3 tracks, is good to ground them with via?
and also I make length-matching in all diff pair but Altium detect them as gab differences from my defined rules for differential routing rules, I defined a room for places in area ( by example close to HDMI component to ignore them, but doesn't work!
Interesting that I made DRC check on OpenRex board and get same error!!

[robertferanec]

I often use minimum clearance between track-and-VIA or track-and-pad (even when I route differential pairs, they are often routed very close to VIAs or pads) - so this should be ok. Also, when routing differential pairs close to each other, I always try to keep distance between differential pairs bigger than distance between + & - signals, but as big as I can - that looks also ok.

However, what you may want to correct is same_net-same_net clearance. For example have a look at UDRTR3_P - seems to me routed too close to the UDRTR3_P pin. You will not get an error as it it the same net, however, the space between the track and pad may be too small to be manufactured.