Serial Termination Resistor Placement

[jpartis1]

Hi All,

I'm laying out some SDRAM connected to FPGA, and wondering where to place terminating resistors on the data nets.
I know you usually place the serial terminators close to the driver, but since the driver will depend on whether the FPGA is writing or reading from the memory.
Should I please the resistors "half way between" the two devices?

Thanks!
John

[robertferanec]

I was just answering this here: http://www.fedevel.com/designhelp/fo...find-impedance

[jpartis1]

Thanks Robert!!