Due to size constraint I have to layout 24V power rail over inner 3.3V power rail, they're all inner layer wide trace, i make polygon. I'm afraid of noise/ripple from 24V can effect to 3.3V, am I correct? I'm not sure? Might happen?
In system have both high and low voltage any recommendation for layout?
3.3V will supply for SOC, so noise on these voltage is the killer for the board.
In system have both high and low voltage any recommendation for layout?
3.3V will supply for SOC, so noise on these voltage is the killer for the board.
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