About 8-PowerTDFN package

[mulfycrowh]

Hi.
I've downloaded this footprint from distributor website.
It is the footprint for a MOSFET.
Pins 5, 6, 7 and 8 are tied together...

[jebin]

Hi,
What is the meaning of "Isolation : DQ/CA/DM/CS/CK/DQS to any aggressor : -40 dB" and how to implement in Layout?.

...

[mulfycrowh]

Hi everyone,

Is there a way in Altium to know all the components assigned to a same footprint?

Thank you

[MrSun]

Hi everyone,
I want to create bom just contain the Top layer,but i didn't know how to setup with altium designer 20.2.6.

[tariq1996]

Hello there,
I have a small issue here, which is, if I have a rule violations about (Silk To Solder Mask), then, I need to change the silk of the...

[ZsoltFulop]

Hello,
I have a question maybe it`s an unusual one but I hope somebody can explain to me:
I am currently working in an electronic manufacturing...

[jsa1717]

Hello.
I am a 3rd year undergraduate student in the field of electronics and communication engineering. I am interested in becoming an hardware...

[mulfycrowh]

Hi,

I have a connector with one slotted pad for a grounded pin.
It is vertical with a height of 1.9 mm and a width of 0.9 mm.
...

[rajat_jain_785]

Hello,

Please find the snapshot from the PCB Board of one of the development boards available from TI attached.

There is a VIA...

[mulfycrowh]

Hi.

on this drawing for a BGA, I do not understand the meaning of ddd and eee.
thanks for help.