The more you add shielding vias, especially on very dense design, the more you get issues with power supplies planes.
How do you manage them?
mulfycrowh
Senior Member
Last Activity: 01-19-2023, 09:19 AM
Joined: 12-31-2016
Location:
-
Is there a way in AD to add GND shielding vias based on the remaining possible locations?
I am asking because with a 12 layers, it is very time...Leave a comment:
-
I deleted the pair and rewrote it.
Everything OK.Leave a comment:
-
Distance of one polarity in a pair is radically different from the other one
Hi everyone,
Did you already have the case?
The negative polarity has a distance of 120,312 mm, the positive 129,087 mm.
... -
In the mean time, I found this very interesting article sharing insertion loss for 16 inch PCIe lanes:
Getting Ready for 32 GT/s PCIe 5.0 Designs...Leave a comment:
-
robertferanec Robert, how do you proceed with shielding vias on 12 or 16 layers projects?
I tried automated process but got many clearance violations....Leave a comment:
-
I am trying the automatic process.
AD places vias too much close from differential pairs and triggers clearance violation.
Is there...Leave a comment:
-
About putting vias as stitching vias that disappear later on
Hi everyone,
I have put a lot of vias on my design yesterday.
I used standard vias as shielding vias.
I didn't use the option... -
Looking for software able to compute the insertion loss at Nyquist frequency
Hi everyone,
Before entering production for a motherboard, I would like to compute the insertion loss at Nyquist frequency (8 GHz - PCIe... -
I have to check "Group Matched Lengths" and not "Within Differential Pair Length".Leave a comment:
-
WhoKnewKnowsI chose the option to create xSignals for all the nets involved in C_DDI3_1HP.
I've got 8 xSignals.
I create a xSignals class....Leave a comment:
-
About matching length between pairs involving capacitors
Hi everyone,
AC-coupling capacitors are important for HDMI differential pairs.
Meaning that we have one capacitor on each polarity... -
WhoKnewKnowsI fixed the issue and I have no clear idea how I did it.
I cleaned everything on the nets on the involved differential pairs.
...Leave a comment:
-
Whatever the object I click on with the net name C_DDI1_2HP1_N (or _P) or C_DDI1_2HP3_N (or _P), AD doesn't find the second differential pair primitive....Leave a comment:
-
Maybe that's an important information: regarding to the differential pairs that are bound to the problem, the involved vias lost their net names just...Leave a comment:
-
WhoKnewKnowsI tried what you said on the via, blue track and pad for _N and _P.
The problem is that I cannot route from the via: AD doesn't find...Leave a comment:
-
Leave a comment:
-
I have 4 differential pairs.
I managed the first one without any problem.
You can see it on the yellow layer.Leave a comment:
-
The differential pair is routed on the yellow layer.
I cut both ends of it on source and load sides, just to understand the issue.
As you...Leave a comment:
-
Ant it is the same problem on the load.
So I think that the issue comes from the differential pair but I don't see where.Leave a comment:
No activity results to display
Leave a comment: