Hi Robert,
You mean you do not combine but leave the polygons separated, right?
Thanks!
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Should I combine those two GND polygons or not? Arguments for and against!
Hello all,
I am about to finish my 8 layer design and would like to inquire you if you can give me some recommendations on the following question....Last edited by Max; 01-14-2022, 03:34 AM. -
Thanks for your attention and advices provide! Really helped!... -
Hello guys,
Thanks fir the hints, they are really useful.
But my question was more about the process of being notified which components...Leave a comment:
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DBlib library maintenance
Hi,
I am usign an excel data base library which works fine with more than 3500 items inegrated.
The question is, how you maintain... -
Hello Robert!
I think it would be applicable also for Dram, but I am wondering what should I use as a reference to compare my results. So far I...Leave a comment:
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Hello Robert!
I am want to validate it against some timing diagrams. Are not there some IEEE standards or Jedec you are aware of? For example the...Leave a comment:
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SDR SDRAM validation techniques
Hello all,
In my design, I am using single data rate SDRAM memory attached to the DSP.
Has anyone from the forum tried or can support... -
What kind of simulation tool?
Hell all,
The purpose if this topic is ti collect as many as possible feedbacks from people using pcb simulation tools.
A short intro-... -
Copper Balancing/ Copper Thieving creation
Hello all,
Could you please share how you are designing copper balancing?
I am trying to follow the approach proposed here Via Stitching... -
Hello,
Thanks for your proposal, Lakshmi!
I, ve just attached a picture, where the traces in red color are on the bottom layer 8, and the...Leave a comment:
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Decoupling capacitors between two power planes +3.3V and +5V
Hello all,
I have designed an 8 layer board, with mounted components on both sides. However, on the bottom signal layer a set of tracks (JTAG signals)...
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